HD74LS73AP : Dual J-K Flip-Flops (with Clear)
Operating Voltage: 4.75V to 5.25V (Standard 5V).
Triggering: Negative-edge triggered, meaning the state changes on the high-to-low transition of the clock pulse.
Clock Frequency: Typical maximum clock frequency of 30 MHz.
Power Dissipation: 400 mW total.
Operating Temperature: -20°C to +75°C.
Propagation Delay: Approximately 13 ns to 25 ns.
Utmel
Utmel
+5
Pin Configuration
The HD74LS73AP comes in a DIP-14 (Dual In-line Package) with 14 pins.
Censtry.com
Censtry.com
+1
Pin 1, 5: Clock inputs for flip-flop 1 and 2.
Pin 2, 6: Clear (Reset) inputs for flip-flop 1 and 2; these are active-low.
Pin 3, 7, 10, 14: J and K data inputs for both flip-flops.
Pin 4: Vcc (Power supply, typically 5V).
Pin 11, 13: Ground and complementary outputs.
Pin 12, 13: Output Q and Q for the second flip-flop.